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Processing Instruction
Results: 1077

#	Item
71	Micro-Policies A Framework for Verified, Hardware-Assisted Security Monitors Cătălin Hrițcu INRIA Paris Add to Reading List Source URL: prosecco.gforge.inria.fr Language: English - Date: 2015-05-22 07:30:22 Central processing unit Pointer Instruction set
72	µ MOTOROLA M68000Bit Microprocessors User’s Manual Ninth Edition Add to Reading List Source URL: tict.ticalc.org Language: English - Date: 2002-08-23 04:17:08 Instruction set architectures Central processing unit Computer architecture Motorola Instruction set Addressing mode Microprocessor ARM architecture
73	yescrypt - a Password Hashing Competition submission Name of the submitted scheme: Name and email address of the submitter(s): Originally submitted on: This revision: Add to Reading List Source URL: password-hashing.net Language: English - Date: 2015-10-25 04:56:20 Computing Computer architecture Cryptography Central processing unit Parallel computing Instruction set architectures Scrypt Salsa20 SIMD ARM architecture X86 SHA-2
74	CFIMon: Detecting Violation of Control Flow Integrity using Performance Counters Yubin Xia† ‡, Yutao Liu† ‡, Haibo Chen†, Binyu Zang‡ †Institute of Parallel and Distributed Systems, Shanghai Jiao Tong Unive Add to Reading List Source URL: ipads.se.sjtu.edu.cn Language: English - Date: 2012-08-23 22:16:01 Central processing unit Machine code Software bugs Return-oriented programming Computer memory Instruction set architectures Buffer overflow protection Self-modifying code Subroutine Stack Return-to-libc attack Instruction set
75	From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware Haibo Chen† , Xi Wu† , Liwei Yuan† , Binyu Zang† , Pen-chung Yew‡ , and Frederic T. Chong§ † ‡ Add to Reading List Source URL: ipads.se.sjtu.edu.cn Language: English - Date: 2012-01-05 23:25:08 Computer architecture Computing Computer engineering Central processing unit Instruction set architectures Processor register Itanium X86 CPU cache Optimizing compiler 64-bit computing Pointer
76	Cache Refill/Access Decoupling for Vector Machines Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanović Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Add to Reading List Source URL: www.lcs.mit.edu Language: English - Date: 2004-11-20 00:25:45 Computing Parallel computing Computer architecture Central processing unit Computer hardware Data parallelism Cache control instruction
77	MonetDB/X100: Hyper-Pipelining Query Execution Peter Boncz, Marcin Zukowski, Niels Nes CWI Kruislaan 413 Amsterdam, The Netherlands {P.Boncz,M.Zukowski,N.Nes}@cwi.nl Add to Reading List Source URL: www-db.cs.wisc.edu Language: English - Date: 2011-09-16 15:44:48 Central processing unit Relational database management systems Instruction set architectures Cross-platform software MonetDB Structured storage Column-oriented DBMS Pipeline CPU cache Optimizing compiler Vector processor Reduced instruction set computing
78	Efficient Software Implementation of Binary Field Arithmetic Using Vector Instruction Sets Diego F. Aranha Department of Computer Science University of Bras´ılia Joint work with Add to Reading List Source URL: caramba.loria.fr Language: English Computer architecture Computing X86 instructions Binary arithmetic Computer engineering Central processing unit Computer arithmetic Instruction set Streaming SIMD Extensions Bitwise operation Bit manipulation SSSE3
79	Procedure Call Standard for the ARM Architecture Add to Reading List Source URL: infocenter.arm.com Language: English Subroutines Central processing unit Acorn Computers ARM architecture Calling convention Application binary interface Pointer 64-bit computing Processor register Stack SIMD Instruction set
80	Modular Deductive Verification of Multiprocessor Hardware Designs Muralidaran Vijayaraghavan1 , Adam Chlipala1 , Arvind1 , and Nirav Dave2 1 MIT {vmurali,adamc,arvind}@csail.mit.edu Add to Reading List Source URL: plv.csail.mit.edu Language: English - Date: 2015-12-16 11:34:18 Computing Computer architecture Computer hardware Microprocessors Central processing unit IBM PC compatibles Instruction set architectures Microcomputers Program counter X86

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